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    The surprising way Huawei wants to beat U.S. chip restrictions

    Huawei logo on screen place above US flag
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    Huawei may have found a different path through America’s chip restrictions, and it has little to do with making smaller transistors. Instead of trying to close the manufacturing-process gap with foundries such as TSMC, Huawei is betting that faster communication inside chips could matter just as much as transistor size in the years ahead.

    That shift is getting attention because China’s access to the world’s most advanced chipmaking equipment has been heavily restricted since 2019. U.S. export controls blocked Chinese firms from buying ASML’s cutting-edge EUV lithography machines, which are widely seen as essential for producing the smallest and most advanced semiconductors. Huawei now appears to be responding by trying to redesign the rules of chip progress itself.

    Huawei wants to change the focus of chip design

    For decades, the semiconductor industry followed Moore’s Law, the long-running observation that transistor counts on chips tend to double every two years. Smaller transistors generally lead to faster and more powerful chips, which is why the global industry has spent years racing toward increasingly tiny manufacturing processes.

    Huawei’s new idea moves in a different direction. The company introduced what it calls the “Tau Scaling Law,” which focuses on reducing the time it takes signals to move through chips and larger computing systems. Rather than relying entirely on smaller transistors, Huawei believes smarter internal communication could unlock future performance gains.

    Man holding electronic microchip.
    Source: Depositphotos

    The centerpiece of that strategy is something Huawei calls “LogicFolding.” The concept involves stacking logic, memory, and analog circuits into tightly connected structures so information can travel faster between layers. Huawei argues this approach could improve chip density, efficiency, and clock speeds over the next decade.

    The strategy is partly shaped by sanctions

    Huawei executives openly linked the project to the company’s struggle under U.S. sanctions. He Tingbo, president of Huawei’s semiconductor business, said the industry was already approaching a physical limit where Moore’s Law would eventually slow down anyway. But she added that external restrictions forced Huawei to hit that wall earlier than many global rivals.

    That pressure may have pushed Huawei to experiment with alternatives faster than other companies. Since Chinese firms cannot freely access the most advanced EUV systems, Huawei appears to be investing more heavily in architectural changes and system-level design improvements rather than relying purely on manufacturing breakthroughs.

    The company believes this could allow China to keep advancing semiconductor performance even without the newest foreign chipmaking tools. If successful, the strategy could help Chinese firms remain competitive despite ongoing export restrictions.

    Not everyone sees it as revolutionary

    Some chip experts remain cautious about Huawei’s claims. Critics argue that reducing latency and improving internal chip communication are already standard parts of semiconductor engineering. Advanced packaging and 3D stacking technologies have been widely used for years by companies across the industry.

    TSMC, for example, already uses a packaging technology called SoIC that tightly integrates chiplets in stacked designs. Memory makers like SK Hynix and Samsung also rely heavily on advanced stacking techniques to improve AI chip performance and energy efficiency.

    NVIDIA CEO Jensen Huang downplayed the idea’s novelty during remarks in Taipei. Huang said TSMC has worked on die stacking and 3D packaging technologies for nearly a decade, suggesting Huawei’s approach may not dramatically disrupt current industry leaders.

    Huawei says its version goes further

    Huawei insists its design is different from traditional 3D stacking. According to Huawei Semiconductor chief scientist Liao Heng, the company carefully splits critical logic paths across multiple layers in ways that go beyond common packaging techniques.

    The company believes this could unlock performance improvements without depending entirely on smaller process nodes. Huawei also suggested the design may benefit everything from smartphones to massive AI data centers if it scales properly.

    Still, major technical questions remain unanswered. Analysts at Bernstein warned that stacking more chip layers can increase heat and power density, potentially making chips harder to cool. Production yields and manufacturing costs could also become serious obstacles.

    Little-known fact: Huawei employs more than 213,000 people and operates across over 170 countries and regions, with its products and services reaching more than three billion users worldwide.

    The next Kirin chip could reveal whether it works

    Huawei’s biggest test may arrive later this year with a new Kirin smartphone chip expected to use the LogicFolding architecture for the first time. The company claimed the chip could improve power efficiency by 41 percent while boosting peak operating speed by nearly 13 percent compared with earlier single-layer designs.

    Those numbers would represent meaningful gains if Huawei can achieve them at a commercial scale. But outside experts say there is still little independently verified data available about performance, costs, or manufacturing yields.

    Analysts also note that Huawei may need entirely new chip design software to fully support folded architectures. Existing EDA tools from companies like Cadence and Synopsys play a central role in advanced semiconductor development, and Huawei’s approach could require major adjustments to those systems.

    Why the industry is paying attention

    Even if Huawei’s approach does not immediately surpass TSMC or Nvidia, the company’s strategy highlights how the global chip race is evolving under geopolitical pressure. Instead of simply copying existing semiconductor roadmaps, Huawei is trying to develop alternative methods that work within China’s restrictions.

    The effort also reflects a broader industry reality. Many experts believe traditional transistor shrinking is becoming increasingly difficult, expensive, and physically constrained. That means future chip gains may rely more heavily on packaging, system design, and faster communication between components.

    Huawei’s experiment could therefore matter beyond China. If the company proves that system-level optimization can offset some manufacturing disadvantages, other chipmakers may begin exploring similar strategies more aggressively in the years ahead.

    Little-known fact: Huawei invests more than 10% of its annual sales revenue into research and development every year, helping the company keep expanding its work in chips, AI, and telecommunications technology.

    A different kind of chip race may be starting

    For now, Huawei’s claims remain largely unproven. The company still faces major challenges involving heat management, software tools, production costs, and large-scale manufacturing reliability. Rival firms already possess years of experience in advanced packaging technologies, making it difficult for Huawei to quickly leap ahead.

    Huawei logo on screen place above US flag
    Source: Lakshmiprasad/Depositphotos

    But the announcement signals something important about the next phase of the semiconductor battle. The future of chips may no longer depend only on who can build the smallest transistors. It could increasingly depend on who can move information through computing systems the fastest.

    TL;DR:

    • Huawei introduced a new chip design idea called Tau Scaling Law.
    • The company wants to improve chip performance by speeding up signal transmission instead of only shrinking transistors.
    • Huawei says its LogicFolding architecture could boost efficiency and operating speeds.
    • The strategy comes as U.S. sanctions continue limiting China’s access to advanced EUV chipmaking machines.
    • Experts remain divided on whether the approach is truly revolutionary or simply an extension of existing 3D chip stacking techniques.
    • Huawei’s next Kirin smartphone chip is expected to become the first major test of the technology.

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